In anticipation of NASA awarding the Human Landing System (HLS) Sustaining Lunar Development (SLD) contract in the near future, Dynetics, a wholly owned subsidiary of Leidos, is seeking a talented Avionics FPGA Lead Engineer with a focus on circuit design to join a diverse team to boost HLS and other programs as part of a diverse team that develops lunar landers, other cislunar spacecraft, and a wide range of critical technologies for civil, military, and commercial space programs.

The person selected for this Avionics FPGA Lead Engineer position will be an experienced FPGA firmware design engineer with varied technical interests and demonstrated engineering skills. The person will be a self-starter with history working with inter-disciplinary teams to solve stimulating technical problems. The engineer will work closely with electronics begin designed and integrated into space vehicles.

Candidate may have to travel as necessary (20-30%)

Basic Qualifications

• Candidate will possess a Bachelor's of Science degree in Electrical Engineering, Computer Engineering, or equivalent degree from an ABET-accredited institution. Preference shown for candidates with a 3.5 or higher GPA.
• Candidate will have 4+ years work history in FPGA firmware development from architecture through implementation, simulation, and hardware testing
• Candidate will have proven work history with hardware description languages such as VHDL or Verilog
• Candidate will have work history with common communication protocols such as: UART, MIL-STD-1553A/B, Ethernet, SPI, I2C, CAN bus, etc.
• Candidate will have hands-on laboratory work history with instrumentation, test equipment, and debug/test methods for proving out FPGA development on hardware
• Candidate will have demonstrated work history effectively conveying within a team environment

Candidates will be a resident of the North Alabama area or willing to relocate to the Huntsville - North Alabama, AL area

Other Qualifications

Preference shown to candidates who possess a Master's of Science in Electrical Engineering, Computer Engineering or equivalent degree from an ABET-accredited institute.

Preference shown to candidates with work history in FPGA firmware development from architecture through implementation, simulation, and hardware testing.

Preferred candidates may have work history and/or working knowledge of the following:

• Developing architectures from system necessities for FPGA implementation
• Implementing complex algorithms targeting FPGAs
• Using VHDL and/or Verilog for synthesizable logic design requiring HDL description
• Providing technical oversight and mentorship to develop team members
• Providing design inputs to board designers during development of custom hardware utilizing FPGAs
• Actively participating in development and improvement of organizational practices for FPGA firmware development
• Providing up to system-level input to program influence during the planning and execution of engineering projects
• Utilizing modern FPGA and SoC families, design tools, and common internal interfaces
• Developing FPGA logic using Verilog HDL (Verilog and/or VHDL)
• Implementing high speed interfaces
• Interfacing with ADCs and DACs
• MIL-STD-1553 and Ethernet (RGMII/GMII) data busses
• Developing secure, safety and mission critical designs

The ideal candidate will thrive in a learning environment that encourages direction and technical growth, and have work history / expertise in one or more of the following areas:

• Space applications
• Control applications
• General DSP applications
• Additional embedded system work history (examples: SoC, ARM, PIC, RTOS)
• Electronics and PCBA design

Security Requirements

Candidate must be a US Citizen and possess (and be able to maintain) a Final Secret Clearance or meet the eligibility to obtain (and maintain) a Secret Clearance.